High-Purity CVD SiC Coated Wafer Boat

1. Core Performance Factors?

• Purity at the 7N Level: We maintain a 99.99999% (7N) purity standard. This is non-negotiable for preventing metal contaminants from migrating into the wafer during long drive-in or oxidation steps.
• The CVD Seal (50–300μm): We don't just "paint" the surface. Our 50–300μm CVD SiC layer creates a total seal over the substrate. This eliminates porosity, meaning the boat won't trap chemicals or shed particles even after repeated exposure to reactive gases or aggressive SPM/DHF cleaning.
• Thermal Rigidity: Silicon Carbide’s natural low thermal expansion keeps these boats straight. They won't sag or twist during Rapid Thermal Annealing (RTA), ensuring the robot arm always hits the right slot without jamming.
• Sustained Yields: The surface is engineered for low byproduct adhesion. Less buildup means fewer particles hitting your wafers and more runs between wet-bench cleaning cycles.
• Custom Geometry: Every fab has its own setup. We machine these to your specific Pitch and Slot drawings, whether you’re running a horizontal furnace or a vertical 300mm automated line.

2. Process Compatibility

• Atmosphere: Resistant to TMGa, AsH₃, and high-concentration O₂ environments.
• Thermal Range: Stable long-term operation up to 1400°C.
• Materials: Specifically engineered for oxidation and diffusion processes of Logic, Power, and Analog wafers.